Algorithms for Synthesis and Testing of Asynchronous Circuits

The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits.

Algorithms for Synthesis and Testing of Asynchronous Circuits describes a variety of mathematical models and algorithms that form the backbone and the body of a new design methodology for asynchronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in exploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms.

While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design. Algorithms for Synthesis and Testing of Asynchronous Circuits also includes an extensive literature review. The review summarizes and compares classical papers from the 1960s with the most recent developments in the areas of asynchronous circuit design testing and verification.